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Toshiba's custom system-on-a-chip (SoC) program combines system and software know-how with deep submicron fabrication technologies, the latest IP cores, embedded memories, and a sophisticated ASIC methodology based on the industry’s best EDA tools.
Toshiba's customers want their custom SoCs to fit their system and software requirements, not the other way around. Often they have to compromise their product to fit inside the box of constraints that face typical custom SoC efforts, such as long development time, high cost, complicated and risk-prone, on-chip systems and new, unproven IP cores.
To meet these requirements, Toshiba has developed a custom SoC program that lets customers fit the SoC to their software by allowing that software to run on the design prior to tape-out. So customers can be sure their SoC will run their code from day one.
Featured Custom SoC Capabilities:
- SoCMosaic™ custom chip enhanced SoC and software services
- Tape out in 6 months using SoCMosaic Custom Chip Soft IP
- Proven 90 nanometer process, 11-layer copper CMOS technology
- Cost-effective embedded DRAM cores of less than 20mm sq for 32 Mb
- Input/output cells support high-speed serial interfaces to
6.25 MHz and beyond, combined with digital IP cores and software
to handle any industry-standard protocol
- High-performance and high pin-count packages
- Aggressive IP core program to provide the latest IP and software
- Open EDA design flow with built-in signal integrity and power
- Co-development support via mixed HDL/C modeling, FGPA emulation
- Local design centers can start with netlists, RTL or just a
block diagram and guide customers through each step in
developing their custom SoC
- Global Toshiba 24/7 design network ensures high-quality results
with fast TAT
Toshiba holds a significant technological lead in delivering low-risk 130nm SoCs by first implementing an aluminum interconnect version followed by a copper interconnect version. An extensive lineup of embedded processor cores and other IP from both internal and third-party suppliers can also be implemented in these designs.
To help customers reduce their overall system design time, and significantly reduce the risk of respins, Toshiba offers system-level co-development models that let software engineers develop and run code, even an OS and device drivers, all before tapeout.