Goya ASIC and SoC Design Service by Goyatek Technology Inc.

SoC Design Services or Consulting

Product Description

1.ASIC and SoC Design Service
i.Goya RTL to GDSII Design Service
 RTL Quality Analysis
 Logic Synthesis & STA
ii.Goya Gate level to GDSII Design Service
 Netlist Quality Analysis
 Million Gates Timing Driven Place & Route
 IR Analysis
 SI Analysis and Crosstalk Prevention
 Logic Equivalence Check
 3D RC Extraction and Delay Calculation
iii.Goya DFT(Design for Test) Service
 Scan Insertion and ATPG
 Memory BIST
 Boundary SCAN/JTAG
iv.SoC integration Design Service

2.ASIC and SoC Turnkey Service
i.ASIC/SoC Design, Manufacture, Packing, Testing Total Solution
ii.MPW (Multiple-Project Wafer) Service

Goya ASIC and SoC Design Service

Market Segment(s)

• General Purpose Products/Services

ARM Processor(s)

• Cortex-A53
• Cortex-A57
• ARMv8

Physical IP

• General Purpose I/O (Inline / Staggered)
• Register File Memory Compilers
• SRAM Memory Compilers
• Standard Cell Libraries

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