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Answer 5 questions that are marked as suggested or accepted answers.
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Arm development studio with Dstream always trigger the core crash
Hello arm:
I use arm development studio with Dstream debug the Linux kernel on cortex A76 + A55 SMP core，but it is always trigger core crash
the kernel log is below:
[ 116.815293] Unable to handle kernel paging request at virtual address fffe000000000...
Unable to read currentel
I am running one example on a72 core.
I am facing issue where i am not able to read any control registers , i was trying to read CurrentEL register.
As my example is running at EL0 ,so i don't have access to read this reg, so i was trying to call SVC(which...
Migrating a project from GCC to Arm Toolchain for Embedded
Learn about migrating software projects to Arm Toolchain for Embedded in this blog post.
Answer a question that is verified as helpful or correct.
Answer 15 questions that are marked as suggested or accepted answers.
tile list is created by hardware directly or by software driver
for tile based rendering, I have a question that how the tile list is created. And I can not figure it out where the FrameData or parameter buffer is. Is it associated with some software variables from driver?
about 16 hours ago
The tile list is created by the hardware, and the memory for it is managed internally by the driver. Ultimately as this is all handled internally you should just be able to render without worrying about the tile specifics. What are you wanting/needing to access the data for?
KleidiAI integration
Hi Team,
I am new to KleidiAI and wanted to understand few things on this? is it supports only matmul operations using SME? does it not support any other operations such pooling, depthwise convolution. If yes then I could not find any source in the github...
about 16 hours ago
Hello!
KleidiAI also supports Neon, so that there is wide coverage of current devices that gain from it as well. Indeed there's currently greater Neon support than SME, although SME is rapidly catching up. The dot product extension and i8mm (both, like Neon, now very common) are also used for some microkernels.
Currently it is just MatMul as that was the most immediately required/desired. It is being actively expanded, and the aim will be to expand across other areas where it will provide significant speed-up, like convolutions. There's still more MatMul microkernels to do though. (I'm not a member of the Kleidi team, so don't know their roadmap for what will be released when).
●Ravi
asked a question inabout 17 hours agoStreamline: Runtime using arm cycles not matching with actual runtime of application
Hi team
Basically, I am inferencing CNN model using ARMNN framework and captured profiling on streamline.
In below example running model for 10 iterations on HW with armcore(clock frequency 1.8GHz)
The runtime showing for inferencing the model in second...
●Ravi
●Ravi
asked a question in9 days agostreamline: problem encountered after stopping the capture
Hello,
I am using arm performance studio "Arm_Performance_Studio_2024.6" to profile ARMNN.
But when i stop capture it is giving error and it will be in analysis state only.
Can anyone help me reason for this issue
There seems to be some issue in the events xml generated, we are still investigating that.
For the time being can you remove all metrics entries for Cortex-A78AE , Cortex-A78 from the events.xml inside apc and reanalyze the capture. We tried it locally with the capture you have provided and it is getting analyzed. See if that helps.
Meanwhile we will try to get this issue fixed in upcoming Streamline release.
I'm developing for C8051F130 in Keil C51. May I ask if Keil provides header files for C8051F130, and are they compatible with C8051F120.h?
Just as the title suggests, I failed to locate the header files for C8051F130 in the installation directory of Keil C51. I'm wondering if there are any header files for C8051F130.
about 13 hours ago
You may want to ask this on the SiLabs forum, but FWIW I have been developing C8051 for quite some time and have no C8051F130 header file anywhere on my PC, only F120. You many need to extrapolate from other data sheets to see how the ADC difference is handled. Also you may want to note that the chip is NRND:
Not Recommended for New Designs: This part is Not Recommended for New Designs (NRND). For newer designs, we recommend you use:
C8051F122
C8051F12x/13x Analog-Intensive MCUs
Can you help?
Arm development studio with Dstream always trigger the core crash
Not answered about 14 hours ago
Unable to read currentel
Not answered about 14 hours ago
Streamline: Runtime using arm cycles not matching with actual runtime of application
Not answered about 17 hours ago