ARM’s highest performing processor, extending the capabilities of mobile and enterprise computing. Read More...
ARM Cortex-R4 SoC Design is a 4-day class for hardware engineers designing systems based around the ARM Cortex-R4 processor core. It includes an introduction to the ARM product range and supporting IP, programmer's model, instruction set architecture, AMBA on-chip bus architecture and the Cortex-R4 debug architecture. The class includes a number of worked examples to reinforce the lecture material.
Hardware design engineers who need to understand the issues involved when designing SoC's around the ARM Cortex-R4 processor core.
Some knowledge of embedded systems and familiarity with digital logic and hardware/ASIC design issues. A basic awareness of ARM is useful but not essential.
* The ARM Architecture
* ARM CPU Architectures
* Memory Subsystems and Memory Management
* Cortex-R4 Overview
* Cortex-R4 Instruction Sets
* Exception Handling
* AXI Bus Architecture
* Primecell Vectored Interrupt Controller
* Processor Core
* L1 Subsystems
* L2 Interfaces
* Clocks, Reset and Power Management
* ARM v6 Memory Types
* Memory Protection
* Multiprocessor Synchronization li type="disc">L2 Cache Controller
* CoreSight Debug Architecture Overview
* Debug and Trace
* ARM Processor Simulation Models