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The Veloce SoC verification system reduces project schedule and cost through simulation acceleration and high performance in-circuit emulation. The Veloce product line supports the Open Verification Methodology (OVM) and Assertion-based Verification (ABV).
• Acceleration of block and full SoC regression test runs by 1000’s of times at both the transaction and signal levels
• Comprehensive, simulation-like debug environment
• Hardware platform for software development and debug months before first silicon is available
• Full system integration using real-world data and software for testbenches before first silicon is available
• Speed up of post-silicon validation before committing changes to silicon by accelerating regression tests
• Platform delivering hardware-software concurrent engineering
• Connects to software development environments
• Elimination of most silicon respins caused by functional errors
The Veloce simulation acceleration/emulation product line has five scalable hardware configurations that can be configured to verify designs from 8 million gates up to 512 million gates within a single chassis. Complementary software and application solutions provide a comprehensive Veloce Systems verification environment.
Veloce: High-performance, high-capacity hardware-assisted solution for verifying embedded systems and SoC designs.
iSolve: Flexible, pre-configured software models and standards-based hardware/software solutions for quickly building complete, high performance SoC verification environments with the Veloce product family.