ARM’s highest performing processor, extending the capabilities of mobile and enterprise computing. Read More...
Intrinsic-ID’s SHA-256 core is a highly efficient hardware IP core implementing the Secure Hash Algorithm Standard (SHA) in compliance with Federal Information Processing Standards FIPS PUB 180-2. It hashes messages of up to 264bits in consecutive blocks of 512 bits using an efficient 64-round compression function.
High throughput core for efficient data hashing
SHA-256 can be used in a number of devices and applications, coming from the field of smart card technology, automotive, government & military communication systems, content protection and more:
Hardware implementation *
~ 66 cycles per block
~776Mbit/s @ 100Mhz
* other trade-offs between gate count and performance available on request
* actual numbers are technology and process dependent