Cortex-A15 Processor

Usage range:

• 1 GHz – 1.5 GHz single or dual-core configurations

Device characteristics:

• Elastic performance:
  • Instant web-browsing, high-bandwidth operation                  
  • Increasing media and floating-point performance
• Optimum power:       
  • Extended low-power range and better battery life
• Richer experience:   
  • Console-quality gaming, navigation, augmented reality applications

Usage range:

• 1 GHz – 2 GHz dual-core  or quad-core configurations

Device characteristics:

•  High-end performance:   
  • General-purpose and media performance  
  • Intensive streaming,
  • Media and graphics and compute workloads.
• Optimum power, thermals:
  • Fan-less operation, energyStar
• Larger physical memory:  
  • Larger than 4GB of memory attached  

Usage range:

• 1.5GHz-2.5 GHz quad-core configurations

Device characteristics:

• High Performance:  
  • High-end Power-efficient single-thread and MP
• High Extensibility:  
  • Coherency for SoC, for performance and   power-efficiency.
• Virtualization support:
  • Efficient virtual machines supported and access to more than 4GB of physical memory

Usage range:

1.5GHz – 2.5 GHz quad-core, octo-core or larger configurations

Device characteristics:

• Performance:  
  • High-end integer, float performance
• Scalability:   
  • “Mega-integration”  > 4 cores. Lower TCO.
• Large memory devices:
  • Support for up to 1TB, h/w virtualization support
• Reliability:  
  • Error correction, soft-fault recovery, monitoring for device integrity

 Cortex-A15 MPCore

Architecture

 ARMv7-A Cortex

Multicore

• 1-4X SMP within a single processor cluster
• Multiple coherent SMP processor clusters through AMBA® 4 technology

ISA Support

• ARM
• Thumb-2
• TrustZone® security technology
• NEON™ Advanced SIMD
• DSP & SIMD extensions
• VFPv4 Floating point
• Jazelle® RCT
• Hardware virtualization support
• Large Physical Address Extensions (LPAE)

Memory Management   

ARMv7 Memory Management Unit

Debug & Trace

CoreSight™ DK-A15

 Cortex-A15 MPCore Key Features

Delivers the peak performance of traditional ARM code while also providing up to a 30% reduction in memory required to store instructions.

Ensures reliable implementation of security applications ranging from digital rights management to electronic payment. Broad support from technology and industry Partners 

NEON technology can accelerate multimedia and signal processing algorithms such as video encode/decode, 2D/3D graphics, gaming, audio and speech processing, image processing, telephony, and sound synthesis

Increase the DSP processing capability of ARM solutions in high-performance applications, while offering the low power consumption required by portable, battery-powered devices. The DSP extensions are optimized for a broad range of software applications including servo motor control, Voice over IP (VOIP) and video & audio codecs.

Hardware support for floating point operations in half-, single- and double-precision floating point arithmetic. The floating point capabilities of the Cortex-A15 processor offer increased performance for floating point arithmetic used in next generation of consumer products such as Internet appliances, set-top boxes, and home gateways.

Provides up to 3x reduction on code size for Just-in-time (JIT) and ahead-of-time compilation of bytecode languages for acceleration in traditional virtual machines

Hardware Virtualization

The Cortex-A15 MPCore processor is the first ARM processor to incorporate highly efficient hardware support for data management and arbitration, whereby multiple software environments and their applications are able to simultaneously access the system capabilities. This enables the realization of devices that are robust, with virtual environments that are well isolated from each other.

Large Physical Address Extensions (LPAE)

The introduction of Large Physical Address Extensions (LPAE) enables the processor to access up to 1TB of memory.

Optimized Level 1 Caches

Performance and power optimized L1 caches combine minimal access latency techniques to maximize performance and minimize power consumption. Caches are 32KB for instruction and 32KB for data. Also providing the option for cache coherence for enhanced inter-processor communication or support of rich SMP capable OS for simplified multicore software development

Integrated, Configurable Size Level 2 Cache Controller

Providing low latency and high bandwidth access to up to 4 MB of cached memory in high frequency designs, or design needing to reduce the power consumption associated with off chip memory access

Reliability and Soft Fault Recovery

AMBA® 4 Cache Coherent Interconnect (CCI)

The CCI provides AMBA 4 AXI™ Coherency Extensions (ACE) compliant ports for full coherency between multiple Cortex-A15 MPCore processors, better utilizing caches and simplifying software development. This feature is essential for high bandwidth applications including gaming, servers and networking that require clusters of coherent single and multicore processors. Combined with the the ARM CoreLink™ network interconnect and memory controller IP, the CCI increases system performance and power efficiency.

Cortex-A15 NEON Media Processing Engine (MPE)

Cortex-A15 Floating-Point Unit (FPU)

Advanced MultiCore Features

The processor also utilizes the widely established ARM MPCore multicore technology, enabling performance scalability and control over power consumption to exceed the performance of today’s comparable high-performance devices while remaining within tight mobile power constraints. Multicore processing provides the ability for any of the four component processors to be shut down when not in use, for instance when the device is in standby mode, to save power. When higher performance is required, every processor is utilized to meet the demand while still sharing the workload to keep power consumption as low as possible. 

Snoop Control Unit

The SCU is responsible for managing the interconnect, arbitration, communication, cache-2-cache and system memory transfers, cache coherence and other capabilities for the processor. The Cortex-A15 MPCore processor also exposes these capabilities to other system accelerators and non-cached DMA driven peripherals to increase performance and reduce system wide power consumption. This system coherence also reduces software complexity involved maintaining software coherence within each OS driver.

Accelerator Coherence Port

This AMBA 4 AXI™ compatible slave interface on the SCU provides an interconnect point for masters that are better interfaced directly with the Cortex-A15 processor. This interface supports all standard read and write transactions without additional coherence requirements. However, any read transactions to a coherent region of memory will interact with the SCU to test whether the information is already stored in the L1 caches. The SCU will enforce write coherence before the write is forwarded to the memory system and may allocate into the L2 cache, removing the power and performance impact of writing directly to off chip memory

Generic Interrupt Controller

Implementing the standardized and architected interrupt controller, the GIC provides a rich and flexible approach to inter-processor communication and the routing and prioritisation of system interrupts. Supporting up to 224 independent interrupts, under software control, each interrupt can be distributed across CPU, hardware prioritised, and routed between the operating system and TrustZone software management layer. This routing flexibility and the support for virtualization of interrupts into the operating system, provides one of the key features required to enhance the capabilities of a solution utilizing a hypervisor.