Gives System Visibility to All Developers
New CoreSight IP gives system visibility to all developers
- CoreSight SoC-400 provides configurable versions of all of the CoreSight SoC components with AMBA Designer support for graphical system design and automated IP stitching.
- System Trace Macrocell provides real-time system visibility for ARM processor-based platforms
- Trace Memory Controller enables trace use up to final product and reduces implementation cost.
Introduction to ARM CoreSight SoC-400
Subtitles are available on this introduction (click on the subtitle icon near the bottom right of the youtube video)
The global cost of debugging software has risen to $312 billion annually. A new whitepaper: "CoreSight SoC enabling efficient design of custom debug and trace subsystems for complex SoCs", outlines the key steps to create a debug and trace solution for an ARM SoC.
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Higher system performance and lower development time with CoreSight
CoreSight System IP enable embedded software developers and SoC designers to develop high performance systems (software and hardware) while decreasing development time and risks.
The CoreSight product portfolio which encompasses ARM Embedded Trace Macrocells is supported by ARM DS-5 Development Studio and Keil MDK, and over 25 other debug and performance analysis tools worldwide, giving product development teams the assurance that their product will be widely supported.
|The Industry name for debug and trace||Higher quality products|
|CoreSight technology is licensed by all major silicon providers, specified by leading OEMs across markets and used by hundreds of thousands of software engineers to develop, debug, optimize and maintain in the field ARM processor-based products||CoreSight technology provides mission critical on-chip visibility to industry developments tools enabling embedded software, system and hardware engineers to develop higher quality and performance software and platforms.|
|Higher productivity and lower risk development||A scalable, cost effective debug and trace SoC solution|
|Using CoreSight trace macrocells (e.g ETM), software and hardware developers can identify real-time software or hardware defects and quickly resolve them, ensuring higher productivity and lower risk developments.||CoreSight technology provides a scalable debug & trace solution able to address all markets from multi core Cortex-A class platform to low cost Cortex-M platforms.|
|Universal tool support||An open architecture|
|CoreSight debug and trace is supported by ARM DS-5 Development Studio and more than 25 tools vendors worldwide and locally (see Tools Support tab).||The CoreSight architecture is an open architecture, enabling Partners to leverage the ARM solution and plug-in their own debug and trace components.|
A CoreSight System IP Diagram with DS-5 and JTAG