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ARM Cortex-A53 MPCore Hardware Design

ARM Training Course

Details on this training course are provided below. Please contact Support for information about booking any of ARM's training courses.



Summary:

This course is designed for those who are designing hardware based around the Cortex-A53 MPCore processors.

Prerequisites:

  • Comprehensive knowledge of the ARMv8-A architecture (see notes below)
  • Familiarity with the AMBA on-chip bus architecture
  • Knowledge of embedded systems
  • Experience with digital logic and hardware/ASIC design issues

Audience:

Hardware design engineers who need to understand the issues involved when designing SoCs around the ARM Cortex-A53 MPCore processor.

Length:

2 or 3 days

Modules:

  • Cortex-A53 MPCore Overview
  • Cortex-A53 CPU Core
  • Cortex-A53 MPCore Memory Subsystems
  • Cortex-A5x MPCore MMU
  • CCI-400 Cache Coherent Interconnect (or CCN-504 Cache Coherent Network)
  • Cortex-A5x Generic Interrupt Controller
  • Cortex-A53 MPCore Clock & Resets
  • Cortex-A53 MPCore Power Management
  • Cortex-A53 MPCore Debug
  • Cortex-A53 MPCore Configuration
  • Cortex-A5x MPCore Booting
  • Cortex-A53 MPCore Implementation & DFT
  • Cortex-A53 MPCore Integration

Notes:

For students who do not have the pre-requisite knowledge of the ARMv8-A architecture and AMBA, we provide an optional one-day introductory course on these subjects.

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