Login

Cortex-A12 Processor

Cortex-A12 Processor Image (View Larger Cortex-A12 Processor Image)
The ARM® Cortex®-A12 processor is a high performance mid-range mobile processing solution specifically designed for mid-range power and area envelopes, and provides an ideal upgrade path from the widely adopted Cortex-A9 processor. Cortex-A12 is based on the successful ARMv7-A architecture, today's most popular architecture in mobile, and offers best-in-class efficiency that fits not just smartphones and tablets, but also applications ranging from Digital TV, Set-top box to automotive infotainment - essentially any consumer market requiring a high performance but energy efficient solution.

The Cortex-A12 processor, and its high performance and high-end feature set, unlocks many new use cases available exclusively in Premium devices today. Mid-range devices can finally build on the success of the high-end and continue driving the fastest growing market segment in mobile.

Architecturally, Cortex-A12 is based on the latest ARMv7-A architecture and features extensions that are aligned with processors like Cortex-A15 and Cortex-A17, including:

  • 1TB addressable memory space (LPAE) – supporting future memory needs
  • Virtualization and TrustZone® security technology – security enabling new use cases like BYOD

Supported by a range of other ARM technology IP including ARM System IP, ARM POP IP and development tools, the Cortex-A12 processor enables ARM powered solutions that contribute to the very best user experience in terms of responsiveness and battery life. The Cortex-A12 processor is a highly tuned processor that will bring the features of high-end mobile devices into mid-range smartphone and tablets, as well as into other great consumer market opportunities.

 


Overview

Cortex-A12 brings high performance into the mid-range and its efficiency profile makes it an ideal choice for thermally restricted mobile devices like smartphones and tablets. It is based on the widely adopted ARMv7-A architecture and offers backwards compatibility to the Cortex-A15, Cortex-A7 and Cortex-A9 processors and allows existing applications to operate seamlessly on Cortex-A12 processor-based SoCs.

Cortex-A12 is an attractive next step for Cortex-A9 designs. Its modern feature set, easy integration and additional performance over Cortex-A9 provide an ideal upgrade path for partners. Find below a feature comparison of Cortex-A9 and Cortex-A12:

The Cortex-A12 microarchitecture consists of a high-performance, high-efficiency pipeline, which delivers significant performance increase over today’s mid-range devices while maintaining uncompromised battery life expected in this market. Tightly integrated NEON/FPU units, integrated L2 cache with optional reliability features, Peripheral Port for low-latency peripheral accesses and an Accelerator Coherency Port (ACP) are just some features available in Cortex-A12 making it an ideal choice for the mid-range mobile market, and other consumer centric applications.

Applications

Cortex-A12 is optimized for modern mobile use case but the performance, power efficiency and feature set of the processor make it a perfect fit for other consumer electronics applications:

  • Mobile - Smartphones, Tablets
  • Digital TV, Set-top box
  • Home Networking
  • Automotive Infotainment and many other consumer applications

Many of these consumer devices today are based on Cortex-A9. Cortex-A12 enables partners to take the next step and upgrade to the next generation of mid-range processors.


The Cortex-A12 processor's sophisticated ground-up pipeline brings a lot of features previously reserved to the high-end only now into the mid-range:
  • Full out-of-order processing;
  • 11+ stage pipeline increases IPC performance by 40%+ over Cortex-A9 r4;
  • Tightly integrated VFP/NEON boosts performance by 50%;
  • State-of-the-art prefetching algorithms and branch prediction technology help with complex workload demands of future devices.

Expected frequencies are in the same range as existing Cortex-A9 based SoC, reaching beyond 2GHz+ in 28nm nodes.


Cortex-A12 Processor
Architecture ARMv7-A Cortex
Multicore 1-4X SMP within a single processor cluster
Multiple coherent processor clusters through AMBA® 4 technology
ISA Support ARM
Thumb®-2
TrustZone® security technology
NEON™ Advanced SIMD
DSP & SIMD extensions
VFPv4 Floating point
Hardware virtualization support
Large Physical Address Extensions (LPAE)
Memory Management ARMv7 Memory Management Unit
Debug and Trace CoreSight™ SoC-400
Cortex-A12 Processor Key Features
Thumb-2 Technology Delivers the peak performance of traditional ARM code while also providing up to a 30% reduction in memory required to store instructions
TrustZone Technology Ensures reliable implementation of security applications ranging from digital rights management to electronic payment
NEON NEON technology can accelerate multimedia and signal processing algorithms such as video encode/decode, 2D/3D graphics, gaming, audio and speech processing, image processing, telephony, and sound synthesis
DSP & SIMD Extensions Increase the DSP processing capability of ARM solutions in high-performance applications, while offering the low power consumption required by portable, battery-powered devices. The DSP extensions are optimized for a broad range of software applications including servo motor control, Voice over IP (VOIP) and video & audio codecs.
Floating-Point Hardware support for floating-point operations in half-, single- and double-precision floating point arithmetic. The floating-point capabilities of the Cortex-A12 processor offer increased performance for floating point arithmetic used in next generation mobile devices
Hardware Virtualization Highly efficient hardware support for data management and arbitration, whereby multiple software environments and their applications are able to access simultaneously the system capabilities. This enables the realization of devices that are robust, with virtual environments that are well isolated from each other.
Large Physical Address Extensions (LPAE) The introduction of Large Physical Address Extensions (LPAE) enables the processor to access up to 1TB of memory.
Optimized Level 1 Caches Performance and power optimized L1 caches combine minimal access latency techniques to maximize performance and minimize power consumption. Caches are configurable size 32kB – 64kB for instruction, and 32kB for data. Also providing the option for cache coherence for enhanced inter-processor communication or support of rich SMP capable OS for simplified multicore software development
Integrated, Configurable Size Level 2 Cache Controller Providing low latency and high bandwidth access to up to 8 MB of cached memory in high frequency designs, or design needing to reduce the power consumption associated with off chip memory access.
Main Bus Interface Cortex-A12 features a 128-bit AMBA® 4 AXI™ interface enabling fast and low latency access to main memory. The tightly integrated L2 cache controller and SCU enable optimized pre-fetching allowing high-performance streaming that will benefit close to all real workloads available.
Peripheral Port This AMBA 4 AXI compatible master interface allows for low-latency accesses to peripherals effectively eliminating any traffic congestion between transactions going to peripherals and main memory resulting in higher overall performance.
Accelerator Coherency Port (ACP) This AMBA 4 AXI compatible slave interface allows an external master to participate in the cache coherency mechanism of the Cortex-A12 processor which reduces the overhead of performing coherency maintenance in software.

The Cortex-A12 processor is supported by a complete ARM IP product portfolio, including:
  • ARM POP IP for various advanced nodes for optimized implementations reducing risk and shortening time-to market
  • ARM Systems IP allowing a rapid system design
  • Enhanced ARM Mali Graphics and Video IP including the Mali-T622 and Mali-V500 solutions
  • Broad range of development tools including the ARM DS-5 toolchain

ARM has designed the Cortex-A12 processor to work efficiently with a complimentary family of high performance, low power ARM CoreLink System IP components. ARM supplies all the major components to move and store data between processors and memory. This includes the NIC-400 network interconnect, DMC-400 dynamic memory controller and MMU-400 system memory management unit as well as fully featured cache controllers, DMA controllers, static memory controllers and memory interface PHYs to the highest specifications. AMBA design tools enable the easy configuration, performance exploration and verification of the ARM subsystem.

Cortex-A12 Companion IP
AMBA 4 Network Interconnect (NIC-400)

The NIC-400 is a highly configurable interconnect IP that can be optimized to suit the requirements of a complex SoC using the AMBA protocols. The QoS-400 Advanced Quality of Service option provides dynamic bandwidth or latency controlled regulators for the efficient and intelligent management of traffic in complex multi-master designs.

New with the NIC-400 is the QVN-400 QoS Virtual Networks option to prevent cross-stream or head-of-line blocking through a priority driven allocation of buffer space to different virtual channels in both the interconnect and the dynamic memory controller (DMC-400, see below).

Efficient voltage scaling and power management is enabled with the CoreLink ADB-400 unlocking DVFS control of the Cortex-A12 processor. Further 'extension' of the DVFS curve also comes when used with the Cortex-A7 processor.
AMBA Generic Interrupt Controller (GIC-400) AMBA Interrupt Controllers like the GIC-400 provide an efficient implementation of the ARM Generic Interrupt Specification to work in multi-processor systems. They are highly configurable to provide the ultimate flexibility in handling a wide range of interrupt sources that can control a single CPU or multiple CPUs.
AMBA 4 CoreLink MMU-500 CoreLink MMU-500 provides a, hardware accelerated, common memory view for all SoC components and minimizes software overhead for virtual machines to get on with other system management functions.
CoreLink TZC-400 The Cortex-A12 processor also enjoys a secure, optimized path to memory to further enhance its market leading performance with the aid of CoreLink TZC-400 TrustZone® address space controller
CoreLink DMC-400 All interconnect components and the ARM DMC guarantee bandwidth and latency requirements by utilizing in-built dynamic QoS mechanisms.
CoreSight™ SoC-400 ARM CoreSight SoC debug and trace hardware is used to profile and optimize the system software running through-out from driver to OS level.

 

Development Tools for Cortex-A12

ARM DS-5 Development Studio fully supports all ARM processors and IP as well as a wide range of third party tools, operating systems and EDA flows. DS-5 represents a comprehensive range of software tools to create, debug and optimize systems based on the Cortex-A12 MPCore processor.

It incorporates DS-5 Debugger, whose powerful and intuitive graphical environment enables fast debugging of bare-metal, Linux and Android native applications. DS-5 Debugger provides pre-defined configurations for Fixed Virtual Platforms (built on ARM Fast Models technology) and ARM Versatile Express boards, enabling early software development before silicon availability.

In addition, Streamline performance analyzer simplifies the identification of hot spots in software and load balancing between cores and clusters with a brilliantly intuitive graphical display.

ARM Compiler 5 includes specific optimizations for the Cortex-A12 MPCore processor, enabling code generation from the earliest stages of your project and is included in DS-5.


Maximise
» 

Help Us Serve You Better

Please help us understand how you use ARM.com by completing this survey. Your input will enable us to improve your overall website experience. Thank you!



Cookies

We use cookies to give you the best experience on our website. By continuing to use our site you consent to our cookies.

Change Settings

Find out more about the cookies we set