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SC100 Processor

SC100 Processor Image
The SecurCore™ SC100™ processor provides the lowest cost introduction to 32-bit ARM secure technology, and enables existing 8 and 16-bit smart card products to migrate to the 32-bit ARM platform easily. The SC100 processor is based on the ARM7™ processor family, the world’s most successful 32-bit processor. More than 5 billion devices based on ARM7 have been shipped worldwide. The SC100 processor supports both ARM and Thumb® instruction sets. The Thumb instruction set provides significantly better code density than existing 8- and 16-bit cores. A very wide range of software development tools are also available from various vendors.
 


Based on the ARM7TDMI 

World’s most widely used 32-bit embedded processors

  • ARM7TDMI® introduced in 1994
  • 170+ silicon licensees
  • 10 Billion+ Units Shipped
  • Continues to be used in a wide variety of designs
  • Multiple upward migration routes available  

 


Exceptional Value

“By now, engineers at many companies can design an ARM7TDMI processor-based chip with their eyes closed. And their programmers can go home early, because the finished silicon will be compatible with existing software“ - Tom Halfhill, Senior Editor & Senior Analyst, Microprocessor Report, 2005

  • Industry standard architecture
  • Balanced PPA   
  • Simple to design & debug
  • Tailored physical, system & 3rd party IP from ARM 

 


Cost Effective

Proven, Low-Risk and Easy to use 

  • Flexible licensing including per-use, multi-year term, and perpetual use licenses.
  • Available as hard-macros to reduce time-to-market and design risks
  • Low cost project entry & rapid time to market

 


Ecosystem

Over 650 members in the Connected Community supporting the ARM7TDMI based SC100

  • Broadest ecosystem of compilers, debuggers and RTOS tools in the industry
  • Plentiful design services partners to aid in design task
  • Large variety of third party IP available to integrate with processors.

 SC100 Performance, Power & Area
 Process

   TSMC 180nm G  

   TSMC 130nm G 

  TSMC 90nm G  

 Optimization

 Speed Optimized

Area Optimized

Area Optimized

 Standard Cell Library  

   ARM SC9 (Sage-X)   

  ARM SC7 (Metro)   

 Performance (Total DMIPS)

 94

 100

 113

 Frequency* (MHz)

 100

 106

 120

 Power Efficiency (DMIPS/mW)

 3.36

 9.4

 15.7

 Area (mm2)

 0.62

 0.24

 0.10

 

Core area, frequency range and power consumption are dependent on process, libraries and optimizations. The numbers quoted above are illustrative of synthesized cores using general purpose TSMC process technologies and ARM Physical IP standard cell libraries and RAMs.

The speed-optimized implementations refer to the library choices and synthesis flow decisions and tradeoffs made in order to achieve the target frequency performance. The area-optimized implementations refer to the library choices and synthesis flow decisions and trade-offs made in order to achieve a target area density.

* Worst case conditions –   0.18µm process - 1.62V, 125C, slow silicon ;  0.13µm process - 1.08V, 125C, slow silicon ;  90nm process - 0.9V, 125C, slow silicon

Power - Typical case conditions– 0.18µm process–1.8V, 25C, typical silicon ;  0.13µm process - 1.2V, 25C, typical silicon ; 90nm process - 1V, 25C, typical silicon

 


 

SC100 Features 

 Architecture  ARMv4T (Von Neumann)
 ISA Support  ARM / Thumb®
 Pipeline  3-Stage
 Dhrystone  0.94 (ARM) / 0.74 (Thumb)          
 Gate Count      Approx 35k
 Interrupts  FIQ / IRQ
 Debug (Removable)                          JTAG
 Availability     Synthesizable / Hard Macro

 

The SC100 processor has several security features which make it an ideal choice for tamper resistant smartcards. Further details on the security features are available under an NDA (non-disclosure agreement) from ARM.


System Development

Connect to standard System IP - AMBA® interconnect compatibility for fast and efficient system design with peripherals and memories

 

Product

Description

 AMBA

AMBA System IP and design tools provide the components and methodology for designers to build SoCs that maximise the efficiency of data movement and storage, enabling high performance at the lowest power and cost. 

 AMBA Design Kit (ADK)

 Enable fast configuration of embedded systems containing Cortex-M Series processors with an AMBA AHB interface.

 AHB Memory Controllers

 For AMBA AHB-based systems ARM provides the PL24X family of dynamic, static and hybrid memory controllers.

 AHB Peripherals

 PL011 Synthesisable UART.
 PL022 Synthesisable Single-wire Peripheral Interface (SPI) controller.
 PL050 Synthesisable keyboard or mouse interface complying with IBM-defined PS/2 interface standard.
 PL061 Synthesisable GPIO controller supporting 8 bits with interrupt control.

 

Tools Ecosystem

Full support from RealView® Microcontroller Development Kit (the Keil uVision environment), the most popular smart card development tool chain in the industry


 
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