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ARM Cortex-R4 Hardware Design

ARM Training Course

Details on this training course are provided below. Please contact Support for information about booking any of ARM's training courses.



Summary:

This course is designed for hardware engineers designing systems based around the ARM Cortex-R4 processor core. Including an introduction to the ARM product range and supporting IP, the course covers the ARM core range, programmer's model, instruction set architecture and AMBA on-chip bus architecture. The Cortex-R4 debug architecture is also covered. The course includes a number of worked examples to reinforce the lecture material.

Prerequisites:

  • Some knowledge of embedded systems
  • Familiarity with digital logic and hardware/ASIC design issues
  • A basic awareness of ARM is useful but not essential

Audience:

Hardware design engineers who need to understand the issues involved when designing SoC's around the ARM Cortex-R4 processor core.

Length:

4 days

Modules:

  • The ARM Architecture
  • ARM CPU Architectures
  • Memory Sub-systems
  • PMSA (v6&7)
  • Memory Access Behavior
  • Cortex-R4 Overview
  • ARM Cortex-R4 Instruction Sets
  • Exception Handling
  • AHB Protocol
  • APB Protocol
  • AXI Protocol
  • AXI Interconnection Architectures
  • NIC301
  • AMBA Designer
  • PrimeCell VIC
  • ARM v6 Memory Types
  • Cortex-R4 Processor Core
  • Cortex-R4 L1 Sub-System
  • Cortex-R4 L2 Interfaces
  • Cortex-R4 Error Handling Schemes
  • Cortex-R4 Implementation
  • Cortex-R4 Memory Protection Unit
  • Cortex-R4 Example System
  • Cortex-R4 Clocks, Resets & Power Management
  • Cortex-R4 Initialization
  • Cortex-R4 Interrupts
  • Cortex-R4 Multi-processor Synchronization
  • Introduction to CoreSight
  • Cortex-R4 Invasive Debug
  • Cortex-R4 Non-invasive Debug
  • ARM Processor Simulation Models
  • Cortex-R4 Integration

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