What is a Chiplet?

A chiplet is a silicon die designed to operate as part of a system. Chiplets can be combined to create larger and more complex systems that can be packaged and sold as a single component, with each chiplet optimized for a specific function or task, such as memory, I/O operations, or processing, and easily assembled into a silicon solution. This eliminates the need to build one single, larger monolithic die, which can present cost-efficiency challenges in some use cases and cause yield-related economic issues when faults are found.

Chiplet Applications

As foundry technologies have progressed, the latest technologies, including 5nm and below, combined with 2.5D and 3D stacking, have created opportunities to use chiplets in new use cases. Chiplets are ideal for high-performance systems where custom silicon would be a benefit. Applications include high-performance computing (HPC) in datacenters and the cloud, generative AI, artificial intelligence (AI), machine learning (ML), consumer electronics and IoT, automotive, and medical devices.

Benefits of Chiplets

Chiplets offer many benefits, including flexibility and scalability when designing or manufacturing complex integrated circuits. In the past, many manufacturers may have been unable to explore the use of custom silicon for economic reasons. Now, chiplets give them a route to achieve a custom-silicon approach.

 

Manufacturers can also optimize process nodes for subsystems, rather than using expensive process nodes for subsystems that don’t require them.

 

Chiplets also reduce waste and improve cost efficiency, by reducing manufacturing costs and increasing yield. As chips get bigger, the inevitable defects in manufacturing can result in discarded silicon. As economic and financial pressures continue, the ability to make smaller chips with less waste is increasingly attractive.

 

Still, to realize the vision of an open chiplet marketplace, designers must navigate a number of issues, including interfaces that are not yet standardized, and face many non-differentiating choices in chiplet partitioning.