Arm Neoverse and the Arm Ecosystem Provide a Holistic Approach to Design Success
Hyperscale challenges drive the need for custom physical implementation recipes, such as logic placement guides and non-default routing rules (NDR).
- Arm works closely with EDA vendors, such as Cadence and Synopsys, to improve timing correlation between placement and final routing to ensure that the tools are optimizing the "real" critical paths.
- Arm Neoverse POP IP core-hardening acceleration technology enables Arm partners to speed their time to market (TTM) while achieving predictable performance, power, area and cost (PPAC).
- Neoverse POP solutions include fast cache instances (FCIs) with specialized features that address the performance push while offering power efficiency.
- A high-performance logic library includes speed enhanced cells and high drive buffers to enable a Flex-H clock tree for tighter cross-corner correlation. The library also supports very tight power grids to mitigate voltage drop and electro-migration (EM) challenges.
Customer Success Story
Neoverse platform enables SiPearl to gain nearly ten years of development and helps fine-tune for super computing.