Cadence

About Cadence

Developing next-generation software-defined compute or autonomous AI applications on Arm-based SoCs involves integrating proven IP with in-house blocks and software. From system definition to foundry-ready silicon design, you need an EDA partner prepared for complex design challenges and process nodes. From early software bring-up to use-case testing, debug, and performance tuning, Cadence offers verification solutions using Arm Fast Models and emulation to ensure design intent and performance requirements. Technologies such as AMBA verification IP check integration, while our SystemReady suite demonstrates your implementation will run an OS out of the box. For physical design, Cadence's optimized digital full flow provides the fastest route to reach PPA targets. Our joint engineering programs provide extensive Arm-ready methodologies to easily implement Arm Cortex, Neoverse, Mali, and CoreLink System IP-based designs including Artisan Physical, POP IP, and Fast Models.