Modern System-on-Chip Design on Arm
by David J. Greaves
ISBN 978-1-911531-36-4
The aim of this textbook is to expose aspiring and practising SoC designers to the fundamentals and latest developments in SoC design and technologies using examples of Arm Cortex-A technology and related IP blocks and interfaces. The entire SoC design process is discussed in detail, from memory and interconnects through to validation, fabrication and production. A particular highlight of this textbook is the focus on energy efficient SoC design, and the extensive supplementary materials which include a SystemC model of a Zynq chip.
This textbook is aimed at final year undergraduate students, master students or engineers in the field looking to update their knowledge. It is assumed that readers will have a pre-existing understanding of RTL, Assembly Language and Operating Systems.
For those readers looking for a entry-level introduction to SoC design, we recommend our Fundamentals of System-on-Chip Design on Arm Cortex-M Microcontrollers textbook.
Table of Contents
1 | Introduction to System-on-Chip |
2 | Processors, Memory and IP Blocks |
3 | SoC Interconnect |
4 | System Design Considerations |
5 | Electronic System-Level Modelling |
6 | Architectural Design Exploration |
7 | Formal Methods and Assertion-based Design |
8 | Fabrication and Production |
9 | Putting Everything Together |
Access
The aim of this textbook is to expose aspiring and practising SoC designers to the fundamentals and latest developments in SoC design and technologies. This resource is aimed at final year undergraduate students, master students or engineers in the field looking to update their knowledge. It is assumed that readers will have a pre-existing understanding of RTL, Assembly Language and Operating Systems.
About the Author
Dr. David J. Greaves, PhD CEng. is a Senior Lecturer in Computing Science at the University of Cambridge, UK and a Fellow of Corpus Christi College.
In 1995, Dr Greaves implemented CSYN, one of the first Verilog compilers for synthesising hardware specifically for field programmable gate arrays. This compiler was distributed widely among local companies on the Cambridge Science Park and also used for undergraduate teaching. It was licensed to a multinational to bundle with its own family of FPGAs.
Dr Greaves holds at least five international patents in the field of communications and electronics. His current research interests remain in the field of compilation tools for design automation and scientific acceleration.