Mobile System Design
The mobile computing market incorporates devices such as smartphones, laptops, wearables, and eXtended Reality (XR). The advanced range of Arm Cortex-A processors power these devices, with the Arm A-profile architecture as the underlying foundation to each processor. This overview of Arm system architecture specifications for the mobile computing market focuses on three key areas:
System architecture for SoC design | Software standards | Security
System Architecture for SoC Design
Successful SoC implementation requires attention to integration and system architecture. Arm offers SoC standardization and system architecture in key areas, including interconnect standards, security implementation, and power control integration.
Platform Security Guide for A Profile
The Platform Security Guide for the A-profile (PSG-A) provides trusted SoC infrastructure requirements and implementation guidance, compliant with industry standards and specifications.
The PSG-A specification covers:
- Secure world isolation
- Security implementation requirements
- Lifecycle management
- Debug, peripheral, and memory considerations
- Requirements checklist
Power Control System Architecture
The Power Control System Architecture (PCSA) for SoCs is based on Arm components. SoC architects, designers, and component designers use this specification to incorporate Arm low-power interfaces for clock and power control.
The PCSA specification covers:
- Voltage, power, and clock partitioning and dependencies
- Power states and modes
- Arm power control framework and integration principles
- Arm component-specific power and clock integration
- Designing IP with Arm low-power Q-Channel and P-Channel interfaces
The PCSA specification (DEN0050) can be accessed through an NDA by contacting Arm and quoting the document number: DEN0050.
AMBA
The Advanced Microcontroller Bus Architecture (AMBA) is an open standard to connect and manage functional blocks in an SoC. AMBA protocols and interfaces are used extensively in mobile computing.
AMBA enables design reuse and a low friction SoC integration. SoC designers also have access to a comprehensive marketplace of third-party IP products, tools, and services, helping to reduce risk, cost of ownership, and time-to-market.
Software Standards
The use of software standards and their adoption by OS and standard firmware vendors provides common interfaces. This eases integration and reduces the per-implementation cost of ownership.
Secure Monitor Call Calling Convention
The Secure Monitor Call Calling Convention (SMCCC) specification defines a common calling mechanism to be used with the Secure Monitor Call (SMC) and Hypervisor Call (HVC) instructions, in both the Armv7 and Armv8 architectures.
The SMCCC specification aims to ease integration and reduce fragmentation between software layers, including:
- Operating Systems (OS)
- Hypervisors
- Secure Monitors
Power State Coordination Interface (PSCI)
The Power State Coordination Interface (PSCI) is a standard interface for power management that OS vendors can use for supervisory software, working at different levels of privilege on Arm. This standard helps ease the integration of supervisory software from different vendors.
The PSCI specification defines an interface for:
- Core idle management
- Dynamic addition and removal of cores, and secondary core boot
- System shutdown and reset
PSCI layers onto SCMI and works alongside hardware discovery technologies, for example Flattened Device Tree (FDT) and Advanced Configuration and Power Interface (ACPI).
System Control and Management Interface
The System Control and Management Interface (SCMI) is a standard interface between an OS and a System Control Processor (SCP). SCMI is extensible and provides protocols to access functions which are often implemented in firmware.
The SCMI specification currently provides protocols for:
- Discovery of supported interfaces
- Power domain management
- Performance management
- Clock management
- Sensor management
- Reset management
- Voltage domain management
- Power capping and monitoring
Download white paper: Power and Performance Management using Arm SCMI Specification
Arm Software Standards
Access all Arm software standards for use in mobile computing, including the SCMI specifications through the software standards page.
Security
Building on Arm TrustZone technology, our security documentation is part of the Platform Security Architecture (PSA) program and provides the foundations for trusted execution environments.
Platform Security Boot Guide
The Platform Security Boot Guide (BOOT-PSG) Specification provides the system and firmware technical requirements for firmware boot and update.
Firmware Framework for A-Profile Architecture
The Firmware Framework for A (FF-A) specification defines a standard programming model to isolate security services from an ecosystem of vendors. It also describes a standard interface for communication between these services and their clients. This interface provides mechanisms for:
- Discovery of available services.
- Synchronous message passing e.g. SMC calls (reference earlier section here - Secure Monitor Call Calling Convention) for accessing a trusted execution environment (TEE) service from the rich operating system execution environment (REE).
- Asynchronous message passing e.g. doorbell notifications from the TEE to the REE.
- Sharing memory e.g. for exchanging messages between the REE and TEE with zero-copy semantics.
- Runtime protection of memory e.g. for establishing a Secure video path for playback of protected content.
Trusted Firmware-A
Trusted Firmware-A (TF-A) is an open-source reference implementation of Secure world software for Arm A-profile architectures.
TF-A implements Arm interface standards, including:- Power State Coordination Interface (PSCI)
- Trusted Board Boot Requirements for Client (TBBR-CLIENT)
- SMC Calling Convention (SMCCC)
- System Control and Management Interface (SCMI)
- Software Delegated Exception Interface (SDEI)
The code is portable and reusable across hardware platforms and software models based on the Arm architectures.